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I'm not an expert, but:

L3 is generally on the order of the same time as main memory - it's main purpose is to reduce the total amount of requests in order to conserve bandwidth

SSDs are on the order of 0.1ms, so 100,000 ns, give or take a factor of 10.

Someone smarter than me will have to answer the NUMA node question.



I think L3 is much faster; perhaps 1/3rd of main memory, assuming the line is available and not in another core. Here are some numbers for L3 cache, from Intel (probably specific to the 5500 series)[1]:

  L3 CACHE hit, line unshared ~40 cycles 
  L3 CACHE hit, shared line in another core ~65 cycles 
  L3 CACHE hit, modified in another core ~75 cycles 
  remote L3 CACHE ~100-300 cycles 
  Local Dram ~60 ns 
  Remote Dram ~100 ns
60ns at 2.4GHz is ~144 cycles, right?

1: http://software.intel.com/sites/products/collateral/hpc/vtun...


Sorry, these were rhetorical questions :)

I was trying to make the point that these numbers are somewhat arbitrary (i.e. why do I need to know the access speed to disc, when I keep everything in memory on a NUMA system?) and don't apply to all programmers (e.g. embedded systems may not have discs, L2 Caches or internet access).




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